Language Breakdown
Lines of code distribution across 20 owned repositories
Generalist Developer
G-shapedVersatile across many languages and paradigms
Collaboration Network
Global Impact visualization
Repos
20
PRs
0
Growth
+18%
Top Collaborators
No collaborator data yet.
Coding Streak
Contribution activity over the past year
Top Repositories
Project0 for HarvardX CS50W CS50's Web Programming with Python and JavaScript
Design and simulation of a 32-bit single-cycle RISC processor in Logisim, featuring custom instruction encoding, datapath architecture, ALU operations, and control logic.
C implementation of Prim’s and Kruskal’s algorithms to construct a minimum spanning tree and compare their performance.
A Verilog-based FSM traffic light controller with pedestrian support, timing control, fairness logic, and self-checking testbench verification.
A 4-bit ALU designed in Verilog using structural, dataflow, and behavioral modeling, with full simulation and digital circuit implementation.
A 32-bit pipelined predicated RISC processor designed in Verilog with hazard detection, forwarding, stalling, and simulation-based verification.
A MIPS assembly program that detects the maximum clique in an undirected graph using a brute-force approach. The program reads an adjacency matrix from an input file, validates it, computes the largest clique, and writes the results to an output file, including handling invalid inputs and no-clique cases.
Python-based simulator for CPU scheduling with priority, round-robin, aging, and deadlock detection & recovery. (for Operating system course)
Java-based parallel data analyzer comparing naive, multithreading, and multiprocessing performance on large CSV datasets.
Open Source Impact
Contributions to external projects
No external contributions found.